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Electrical characteristics of β-Ga2O3 thin films grown by PEALD

机译:PEALD法制备的β-Ga2O3薄膜的电学特性

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摘要

In this work, 7.5 nm Ga2O3 dielectric thin films have been deposited on p-type (1 1 1) silicon wafer using plasma enhanced atomic layer deposition (PEALD) technique. After the deposition, Ga2O 3 thin films were annealed under N2 ambient at 600, 700, and 800 C to obtain β-phase. The structure and microstructure of the β-Ga2O3 thin films was carried out by using grazing-incidence X-ray diffraction (GIXRD). To show effect of annealing temperature on the microstructure of β-Ga2O3 thin films, average crystallite size was obtained from the full width at half maximum (FWHM) of Bragg lines using the Scherrer formula. It was found that crystallite size increased with increasing annealing temperature and changed from 0.8 nm to 9.1 nm with annealing. In order to perform electrical characterization on the deposited films, Al/β-Ga2O3/p-Si metal-oxide- semiconductor (MOS) type Schottky barrier diodes (SBDs) were fabricated using the β-Ga2O3 thin films were annealed at 800 C. The main electrical parameters such as leakage current level, reverse breakdown voltage, series resistance (RS), ideality factor (n), zero-bias barrier height (Bo), and interface states (NSS) were obtained from the current-voltage (I-V) and capacitance-voltage (C-V) measurements at room temperature. The RS values were calculated by using Cheung methods. The energy density distribution profile of the interface states as a function of (ESS-EV) was obtained from the forward bias I-V measurements by taking bias dependence of ideality factor, effective barrier height (e), and RS into account. Also using the Norde function and C-V technique, e values were calculated and cross-checked. Results show that β-Ga2O3 thin films deposited by PEALD technique at low temperatures can be used as oxide layer for MOS devices and electrical properties of these devices are influenced by some important parameters such as NSS, RS, and β-Ga2O3 oxide layer. © 2014 Elsevier B.V. All rights reserved.
机译:在这项工作中,已经使用等离子增强原子层沉积(PEALD)技术在7.5型Ga2O3介电薄膜上沉积了p型(1 1 1)硅片。沉积之后,将Ga 2 O 3薄膜在N 2环境下在600、700和800℃下退火以获得β相。 β-Ga2O3薄膜的结构和微观结构是通过使用掠入射X射线衍射(GIXRD)进行的。为了显示退火温度对β-Ga2O3薄膜的微观结构的影响,使用Scherrer公式从布拉格线的半峰全宽(FWHM)获得了平均晶粒尺寸。已经发现,随着退火温度的升高,微晶尺寸增加,并且随着退火温度从0.8nm变化到9.1nm。为了对沉积的膜进行电表征,使用β-Ga2O3薄膜在800°C的温度下制造了Al /β-Ga2O3/ p-Si金属氧化物半导体(MOS)型肖特基势垒二极管(SBD)。从电流-电压(IV)获得主要的电气参数,例如泄漏电流水平,反向击穿电压,串联电阻(RS),理想因子(n),零偏置势垒高度(Bo)和界面状态(NSS)。 )和室温下的电容电压(CV)测量。通过使用Cheung方法计算RS值。通过考虑理想因子,有效势垒高度(e)和RS的偏置依赖性,从前向偏置I-V测量获得了界面状态的能量密度分布曲线(ESS-EV)的函数。同样使用Norde函数和C-V技术,计算e值并进行交叉检查。结果表明,低温下通过PEALD技术沉积的β-Ga2O3薄膜可用作MOS器件的氧化物层,这些器件的电学性能受NSS,RS和β-Ga2O3氧化物层等重要参数的影响。 ©2014 Elsevier B.V.保留所有权利。

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